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Hot-Swap Sequence
Hot-Swap Sequence
Figure 6-56 and Figure 6-57 on page 104 show the switching on of the hot-swap interface signals during an insertion
sequence and an extraction sequence.
clk
framen
ad[31:0]
HS
HS
CFG Data
cben[3:0]
A
0
B
0
B
devseln
irdyn
trdyn
dp_start
dp_done
hs_bdseln
hs_switchn
hs_enumn
hs_healthyn
hs_ledn
rst_outn
hs_powgoodn
hs_powfailn
Figure 6-56 · Hot-Swap Insertion Sequence
The HS_BDSELN signal becomes active at the start of the insertion sequence. This causes the core to exit the reset
condition, asserting its HS_ENUMN and HS_HEALTHYN outputs. Sometime later, the PCI Master reads the hot-
swap register to see why HS_ENUMN is active. In this case, bit 23 will be active, indicating an insertion. After this, the
PCI Master clears the insertion status bit, causing HS_ENUMN to become inactive. The PCI Master then sets up the
PCI configuration space.
v4.0
103
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